AMD, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx are joining forces to bring a high-performance open acceleration framework to data centers, collaborating on the specification for the new Cache Coherent Interconnect for Accelerators (CCIX).

A single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators and enable efficient heterogeneous computing.

Applications such as big data analytics, search, machine learning, NFV, wireless 4G/5G, in-memory database processing, video analytics, and network processing, benefit from acceleration engines that need to move data seamlessly among the various system components. CCIX is expected to allow these components to access and process data irrespective of where it resides; enabling both off-load and bump-in-the-wire inline application acceleration while leveraging existing server ecosystems and form factors.